X-Architecture Obstacles-Avoiding Routing with ECO Consideration

نویسندگان

  • Jui-Hung Hung
  • Yao-Kai Yeh
  • Yu-Cheng Lin
  • Hsin-Hsiung Huang
  • Tsai-Ming Hsieh
چکیده

In the paper, we formulate a novel obstacle-avoiding engineering change ordering (ECO) driven minimal tree construction problem. The objective is to build a better routing tree in the sense of increasing ECO flexibility to force the routing tree pass through regions in which more spare cells are available so that the additional total wirelength compared to a conventional wirelength oriented routing tree can be minimized. We incorporate the concept of inserting the virtual nodes which indicate sub-regions having more available spare cells by evaluating the distribution of spare cells. With the terminals, the corners of obstacles and the added virtual nodes, a routing tree is then constructed. Experimental results show that the number of available spare cells near the routing tree constructed by our algorithm is increased up to 65.82%, while only 2.08% of additional total wirelength. Keywords—ECO, Routing, Obstacle-avoiding, Routing tree

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

A Multi-layer Obstacles-Avoiding Router Using X-Architecture

In recent years, scaling down device dimension or utilizing novel crystallization technologies provide the opportunity of applying much more devices to integrated circuit fabrication. Due to emerging DSM effects, the research about routing has drawn much attention in VLSI Physical Design. In this paper, we will focus on three issues. One, the traditional Manhattan routing has longer length and ...

متن کامل

Efficient implementation of a planar clock routing with thetreatment of obstacles

In this paper, we present an automatic clock tree design (ACTD) system for high speed VLSI designs. The ACTD is designed to extend the capabilities of the existing computer aided design tools and provides a convenient environment to CAD users. We have developed new theoretical analyses and heuristics. Specifically, the following issues are considered: (i) a planar clock routing, (ii) a solution...

متن کامل

Integration of Traffic Information into the Path Planning among Moving Obstacles

This paper investigates the integration of traffic information (TI) into the routing in the presence of moving obstacles. When traffic accidents occur, the incidents could generate different kinds of hazards (e.g., toxic plumes), which make certain parts of the road network inaccessible. On the other hand, the first responders, who are responsible for management of the traffic incidents, need t...

متن کامل

Performance Analysis of the Algorithms forthe Construction of Multilayer Obstacle Avoiding Rectilinear Steiner Minimum Tree

Routing is a phase in the physical design of Electronic Circuits. The main aim of routing in VLSI design is to interconnect the cells that have been assigned positions as a solution of the placement problem. The problem of finding Rectilinear SteinerMinimal Tree (RSMT) is one of the fundamental problems in the field of Electronic Design Automation. The obstacle avoiding rectilinear Steiner mini...

متن کامل

FORst: A 3-Step Heuristic For Obstacle-avoiding Rectilinear Steiner Minimal Tree Construction ?

Macro cells, IP blocks, and pre-routed nets are often regarded as obstacles in VLSI routing phase. Obstacle-avoiding rectilinear Steiner minimum tree (OARSMT) algorithms are often used to meet the needs of practical routing applications. However, OARSMT algorithms with multi-terminal nets routing still can not satisfy the requirements of practical applications. This paper presents a 3-step heur...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2010